================================================= 6x86set / 6x86set2 Cyrix/IBM/ST 6x86 (M1/M2) Processor Setup Program ================================================= v0.80 (c) Mikael Johansson 1997-1998 Unregistered ShareWare version *WHAT THESE PROGRAM DO* ----------------------- These programs identify your 6x86 (revision and so on), and lets you view and alter almost all of the registers on your CPU, including the undocumented regs that I'm aware of. The help screens give concise info about the interesting bits of each register screen. 6x86set is for the 6x86/6x86L == M1 6x86set2 is for the 6x86MX == M2 In this document 6x86set will refer to both 6x86set and 6x86set2, unless otherwise noted. 6x86set is also used to make a configuration file for 6x86opt. *USING THE PROGRAM* ------------------- To start 6x86set just run it without any parameters. If you give some parameters, the program will just show you a little message. 6x86set starts at the Main Screen, which identifies your system. If this is all you want to do, press to quit the program. The bottom of the screen always gives you the available keys for each screen. For example, use the arrow keys to browse all the different screens available. The On-line Help screens explain the use of the keys more thoroughly: Pressing will bring up a Help panel with additional info about the bits presented on the current screen. Successive presses will bring up the General Help screens, describing the use of the program in more detail! *WARNING MESSAGES AT THE ARR/RCR SCREENS* ----------------------------------------- First, you could get a warning message complaining that the Starting Address should be an even multiple of the Region Size. You should probably correct the values, as undefined behaviour results of this. You could also get warning messages at ARR0, ARR1 and ARR7. This means that the ARRs don't define the recommended memory areas. Below is a list of how the ARRs/RCRs should look: > ARR0 is recommended to define the video buffer ARR0: Starting Address: 000A 0000h, Region Size: 128 KB RCR0: bit 5: 0 NLB 4: 0 WT 3: 1 WG ; Write Gathering enabled, important! 2: 0 WL 1: 0 WWO 0: 1 RCD ; Caching disabled for compatibility > ARR1 is recommended to define expansion card/system ROM area ARR1: Starting Address: 000C 0000h, Region Size: 256 KB RCR1: bit 5: 0 NLB 4: 0 WT 3: 0 WG 2: 0 WL 1: 0 WWO 0: 1 RCD ; Caching disabled for compatibility > ARR7 should define main memory ARR7: Starting Address: 0000 0000h, Region Size: Total system memory size RCR1: bit 5: 0 NLB 4: 0 WT 3: 1 WG 2: 1 WL ; Weak Locking enable 1: 1 WWO ; Weak Write Ordering enable 0: 1 RCE ; Region cache enable NOTE on ARR7: the Region Size should be rounded upwards to the nearest fitting size. Then other ARRs/RCRs should be used to disable cache on the non-existent memory space (if present). If your system doesn't do this, contact me, and I'll see if I would get inspired enough to make this an automatic function. NOTE on all ARRs: v0.80 of 6x86set doesn't check the RCRs of the regions. So even if no warning messages are displayed, check the RCRs manually. 6x86opt can set up ARR/RCR0 and 1 properly with the -ARR0+1 parameter! NOTE: It could be that the ARR0 and 1 recommended definitions are found elsewhere in the ARR space. At least some MR. BIOS:es define these in an unstandard way. This would be acceptable, if it didn't make it harder for other software to define ARRs. *EXIT CODES* ------------ The following exit codes can be generated: 0 : 6x86set quit without problems 1 : 6x86set was invoked with some parameter 3 : 6x86set detected and M1/M2 when it handles only M2/M1 4 : 6x86set did not detect a 6x86 CPU Any other codes _should_ never be generated. *VERSION HISTORY* ----------------- v0.76 : First released version. v0.77 : Added the command (moves reg -> set). Corrected some typos. v0.77f: Added the MHz field at the Main Screen. v0.77h: Corrected MHz "bug", failed if L2 cache disabled. Added shortcut for "PIPELOOP" at "opcode patch" screen. Added System Memory field. v0.78 : Added the 'End' field at the ARR-screens. The config file is now saved in the same directory as 6x86set.exe (previously in startup dir). Fixed a bug that occured when trying to define an ARR start address with any low part of byte >9h while high part >0h. v0.78d: Added shortcut for "PIPEXCHG" at "opcode patch" screen. v0.80 : Added M2 version, 6x86set2. Updated information on some bits. Revised the configuration file file structure. *WHY THIS PROGRAM EXISTS* ------------------------- Because I could find no good setup program for the processor anywhere. The only one I found was IBM:s IBMM1. This program however does not let you change any of the reserved bits, and (naturally) doesn't display the confidential registers.