The VPEC Switch Model is an averaged model for the switching element in a power converter. It is similar to the BELLO switch model, but with and additional term of Ic*D*D'*Re. The focus of this write-up will be to see where this Ic*D*D'*Re term comes from. In the buck converter example, the Re is the ESR of the input capacitor. If the ESR is very small, this term is negligible.
The figure below is a buck converter to be used in the derivation.
In the box is the switch element. It represents the two switches found in any Pulse Width Modulated power supply topology. The three terminals on the switch element are termed "a", "p", and "c" for "active", "passive", and "common". The "active" switch (BJT or FET) is connected between the "a" and "c" terminals, and the "passive" switch (diode) is connected between "p" and "c".
For our varables, capital letters like "Vcp" are used to represent average values. A function of time is shown using small letters like "vcp(t)". The subscripts and node names are shown using small letters.
"D" represents the duty cycle of the "active" switch while " D' " (D-prime) is the duty cycle of the "passive" switch. The basic duty cycle equations are as follows:
| Duty Cycle = (Switch On Time)/(Switching Period) | (1) |
| D' = 1 - D | (2) |
| Vcp = D*Vap - Ic*D*D'*Re
Ia = D*Ic |
(3) |
| Vcp = D*Vap
Ia = D*Ic |
(4) |
