Patents

Pei-Hsin Ho

PAT. NO.Title
1 7,469,392 Full-Text Abstraction refinement using controllability and cooperativeness analysis
2 7,454,727; 7,076,753 Full-Text Method and Apparatus for Solving Sequential Constraints
3 7,260,802 Full-Text Method and apparatus for partitioning an integrated circuit chip
4 7,257,782 Full-Text Method and apparatus for reducing power consumption in an integrated circuit chip
5 7,130,783 Full-Text Simulation-based functional verification of microcircuit designs


Last Modified JAN 2009

Pei-Hsin Ho / pho@synopsys.com